EST7610
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PC Power Supply Supervisor
The EST7610 provides protection circuits, power good output (PGO), fault protection latch (FPL_N), and a protection detector function (PDON_N) control. It can minimize external components of switching power supply systems in personal computer. The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level, the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N go HIGH. There is 2.4 ms delay time for PDON_N turn off FPL_N.
www.DataSheet4U.com When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue.
FEATURES
• • • • • • • • The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. Both of the power good output (PGO) and fault protection latch (FPL_N) are Open Drain Output. 75 ms time delay for UVD. 300 ms time delay for PGO. 38 ms for PDON_N input signal De–bounce. 73 us for internal signal De–glitches. 2.4 ms time delay for PDON_N turn-off FPL_N.
PIN ASSIGNMENT AND PACKAGE TYPE
PGI GND FPL_N PDON_N
1 2 3 4
8 7 6 5
PGO VCC V5 V33
ORDERING INFORMATION PACKAGE MARKING ¡]¡^ PACKING ¡°¡]¡´¡^
8–Pin Plastic DIP EST7610A Tube
8–Pin Plastic SOP EST7610AS Tube or Tape&Reel
PIN DESCRIPTION Pin No. Pin Name TYPE Description 1 PGI I power good input pin 2 GND P Ground 3 FPL_N O fault protection latch output pin(open drain output) 4 PDON_N I protection detector function ON/OFF control input pin 5 V33 I 3.3V input pin 6 V5 I 5V input pin 7 VCC I Supply voltage / 12V input pin 8 PGO O power good output pin(open drain output)
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2006-01-A
EST7610
FUNCTION TABLE
PGI < 0.95V < 0.95V < 0.95V 0.95 < PGI < 1.2 0.95 < PGI < 1.2
www.DataSheet4U.com < PGI <1> 1.2 PGI > 1.2 PGI > 1.2 x x = don’t care PDON_N L L L L L L L L L H UV no no yes no no yes no no yes x
PC Power Supply Supervisor
OV no yes no no yes no no yes no x FPL_N L H L L H H L H H H PGO L L L L L L H L L L
BLOCK DIAGRAM
EN0158A_WT7510 BLOCK DIAGRAM
VCC
Power On Reset
150uA
POR LVRST
VCC Low Voltage
Clock Generator
CLK PWR
3.6V
CLK PWR RST 38ms debounce - UN CLK PWR 75 ms delay
CLK 2.4ms delay
PWR
PDON_N
clr
V33
+
+
- OV
clr
V5
+
- UN
CLK RST
R FPL_N Q
+
- OV
73us debounce
S
VCC
+
- OV
CLK RST 73us debounce
CLK 300ms delay
VCC
PGO
PGI
+
- UN
clr
1.2V
+
-
0.95V
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2006-01-A
EST7610
PC Power Supply Supervisor
RECOMMENDED OPERATING CONDITIONS
Parameter Supply voltage, VCC Input voltage Output voltage Operating temperature Output sink current Supply voltage rising time PDON_N, V5, V33, PGI FPL_N PGO -40 FPL_N PGO 1 Conditions Min. 4 Typ. 12 Max. 15 7 15 7 125 30 10 Unit V V V V ¢J mA mA ms
ELECTRICAL CHARACTERISTICS, at Ta=25