Producenci
Altera 874 dokumentacji
NO. | Symbol elementu | Rozmiar pliku | Stron | Opis dokumentacji | Producent |
---|---|---|---|---|---|
701. | Paper | 84 KB | 13 | DES Cores | Altera |
702. | Paper | 117 KB | 6 | Hadamard Transform Processor | Altera |
703. | Paper | 93 KB | 4 | MD5A Hash Function | Altera |
704. | Paper | 30 KB | 3 | NCO Core | Altera |
705. | Paper | 92 KB | 4 | SHA-1 Hash Function | Altera |
706. | Paper | 86 KB | 4 | ľ-Law Companders and A-Law Companders | Altera |
707. | Paper | 146 KB | 12 | Viterbi Decoders | Altera |
708. | Paper | 45 KB | 5 | Designing Wireless Base Stations with APEX CAM | Altera |
709. | Paper | 31 KB | 3 | Implementing ATM Switch with APEX Embedded CAM | Altera |
710. | Paper | 193 KB | 4 | Copper Interconnects in Altera Devices | Altera |
711. | Paper | 137 KB | 8 | Low-Speed Rijndael Encryption/Decryption Processors | Altera |
712. | Paper | 120 KB | 8 | High-Speed Rijndael Encryption/Decryption Processor | Altera |
713. | Paper | 107 KB | 8 | Implementing OFDM Using Altera Intellectual Property | Altera |
714. | Paper | 107 KB | 5 | Building Blocks for Rapid Communcation System Development | Altera |
715. | Paper | 107 KB | 5 | Building Blocks for Rapid Communication System Development | Altera |
716. | Paper | 2.14 MB | 6 | Reed-Solomon FEC Demonstration | Altera |
717. | Paper | 77 KB | 3 | Turbo Codec FEC Demonstration | Altera |
718. | PHCO-17187 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
719. | PHCO-19434 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
720. | PHSS-17159 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
721. | PHSS-17872 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
722. | PHSS-19739 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
723. | PHSS-19866 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
724. | PHSS-21947 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
725. | PHSS-22354 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
726. | PHSS-22514 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
727. | PHSS-22603 | 680 KB | 50 | Installation & Licensing for UNIX Workstations | Altera |
728. | Product | 216 KB | 12 | PIB 18: CPLDs vs. FPGAs: Comparing High-Capacity Programmable Logic | Altera |
729. | Product | 204 KB | 5 | PIB 26: Concurrent Programming through the JTAG Interface for MAX Devices | Altera |
730. | Product Information Brief | 144 KB | 8 | PIB 20: Benefits of Embedded RAM in FLEX 10K Devices | Altera |
731. | Product Information Brief | 226 KB | 20 | PIB 21: Implementing Logic with the Embedded Array in FLEX 10K Devices | Altera |
732. | Product Information Brief | 339 KB | 24 | PIB 29: LVDS Comparision: APEX 20KE vs. Virtex-E Devices | Altera |
733. | Product Information Brief | 120 KB | 7 | PIB 24: Advantages of ISP-Based PLDs over Traditional PLDs | Altera |
734. | Product Information Brief | 164 KB | 4 | PIB 27: Jam Programming & Test Language Overview | Altera |
735. | Product Overview | 58 KB | 2 | APEX Integrated Content Addressable Memory (CAM) | Altera |
736. | Product Overview | 51 KB | 2 | APEX High-Bandwidth I/O Interface Support Solutions | Altera |
737. | Product Overview | 135 KB | 2 | Quartus NativeLink Integration with Exemplar Logic LeonardoSpectrum Software | Altera |
738. | Product Overview | 127 KB | 2 | LeonardoSpectrum with Your Altera Subscription | Altera |
739. | Product Overview | 256 KB | 2 | ModelSim with Your Altera Subscription | Altera |
740. | Product Overview | 1.16 MB | 2 | Power Comparison | Altera |
741. | Product Overview | 1.16 MB | 2 | Power Comparison | Altera |
742. | Product Overview | 79 KB | 2 | SignalTap Logic Analysis | Altera |
743. | Product Overview | 179 KB | 2 | Quartus NativeLink Integration with Model Technology Software | Altera |
744. | Product Overview | 127 KB | 2 | Development Tools Subscription Program | Altera |
745. | Product Overview | 120 KB | 2 | Quartus NativeLink Integration with Synplicity | Altera |
746. | QoS | 191 KB | 10 | Implementing Quality of Service with Altera PLDs | Altera |
747. | Quartus | 786 KB | 8 | Quartus II Brochure | Altera |
748. | Quartus | 59 KB | 3 | TB 73: Archiving Projects with the Quartus II Development Tool | Altera |
749. | Quartus | 65 KB | 3 | TB 74: Timing Driven Compilation in the Quartus II Development Tool | Altera |
750. | Quartus II software | 352 KB | 16 | Quartus Programmable Logic Development System & Software Data Sheet | Altera |
751. | Quartus II software | 259 KB | 16 | AN 118: Scripting with Tcl in the Quartus Software | Altera |
752. | Quartus II software | 1.54 MB | 36 | AN 123: Using Timing Analysis in the Quartus II Software | Altera |
753. | Quartus II software | 2.40 MB | 36 | AN 161: Using the LogicLock Methodology in the Quartus II Design Software | Altera |
754. | Quartus II software | 180 KB | 8 | MasterBlaster Serial/USB Communications Cable Data Sheet | Altera |
755. | Quartus II software | 613 KB | 43 | Quartus II Installation & Licensing for PCs Manual | Altera |
756. | Quartus II software | 894 KB | 8 | Design Software Selector Guide | Altera |
757. | software | 786 KB | 8 | Quartus II Brochure | Altera |
758. | software | 59 KB | 3 | TB 73: Archiving Projects with the Quartus II Development Tool | Altera |
759. | software | 65 KB | 3 | TB 74: Timing Driven Compilation in the Quartus II Development Tool | Altera |
760. | Solution Brief | 58 KB | 4 | SB 5: Numerically Controlled Oscillator Megafunction | Altera |
761. | Solution Brief | 203 KB | 4 | SB 18: Binary Pattern Correlator Megafunction | Altera |
762. | Solution Brief | 150 KB | 4 | SB 25: PCI Bus Target Interface Megafunction | Altera |
763. | Solution Brief | 91 KB | 2 | SB 2: High-Speed Adaptive FIR Filter Megafunction | Altera |
764. | Solution Brief | 37 KB | 2 | SB 3: Biquad IIR Filter Megafunction | Altera |
765. | Solution Brief | 224 KB | 2 | SB 8: ADPCM | Altera |
766. | Solution Brief | 214 KB | 4 | SB 10: Digital Modulator | Altera |
767. | Solution Brief | 220 KB | 4 | SB 19: EC210 PCI Bus Master/Target Megafunction | Altera |
768. | Solution Brief | 236 KB | 4 | SB 4: Complex Multiplier/Mixer Megafunction | Altera |
769. | Solution Brief | 135 KB | 4 | SB 42: Interleaver/Deinterleaver MegaCore Function | Altera |
770. | Solution Brief | 211 KB | 4 | SB 11: Linear Feedback shift Register | Altera |
771. | Solution Brief | 158 KB | 4 | SB 34: IDR Deframer Megafunction | Altera |
772. | Solution Brief | 166 KB | 3 | SB 37: 64-Bit PCI Bus Target Megafunction | Altera |
773. | Solution Brief | 115 KB | 4 | SB 39: I2C Master Interface Megafunction | Altera |
774. | Solution Brief | 146 KB | 3 | SB 26: PCI Bus Master/Target Interface Megafunction | Altera |
775. | Solution Brief | 1.89 MB | 5 | SB 47: System-on-a-Programmable-Chip (SOPC) Development Board | Altera |
776. | Solution Brief | 93 KB | 3 | SB 49: NCO Compiler MegaCore Function | Altera |
777. | Solution Brief | 114 KB | 4 | SB 50: Turbo Encoder/Decoder MegaCore Function | Altera |
778. | Solution Brief | 777 KB | 3 | SB 55: APEX 20KE PCI Starter & Development Kit | Altera |
779. | Solution Brief | 193 KB | 2 | SB 16: Convolutional Interleaver Megafunction) | Altera |
780. | Solution Brief | 45 KB | 3 | SB 22: CAN Bus Megafunction | Altera |
781. | Solution Brief | 94 KB | 3 | SB 32: Telephony Tone Generation Megafunction | Altera |
782. | Technical Brief | 113 KB | 4 | TB 56: Using APEX 20KE CAM for Fast Search Applications | Altera |
783. | Technical Brief | 190 KB | 6 | TB 57: Power Consumption Comparison: APEX 20K vs. Virtex Devices | Altera |
784. | Technical Brief | 130 KB | 4 | TB 60: Advantages of APEX PLLs over Virtex DLLs | Altera |
785. | Technical Brief | 122 KB | 4 | TB 61: CAM Comparison: APEX 20KE vs. Virtex-E Devices | Altera |
786. | Technical Brief | 1.59 MB | 7 | TB 70: Jitter Comparison Analysis APEX 20KE PLL vs. Virtex-E DLL | Altera |
787. | Technical Brief | 47 KB | 3 | TB 34: MAX 7000S Power Consumption | Altera |
788. | Technical Brief | 133 KB | 3 | TB 58: In-Circuit Test Support with MAX 7000 Devices | Altera |
789. | Technical Brief | 138 KB | 5 | TB 62: MAX 7000AE Performance Comparison | Altera |
790. | Technical Brief | 146 KB | 3 | TB 63: Programming Time Comparison: MAX 7000AE vs. XC9500XL Devices | Altera |
791. | Technical Brief | 98 KB | 2 | TB 65: Design Fitting: MAX 7000AE vs. ispLSI 2000VE Devices | Altera |
792. | Technical Brief | 27 KB | 1 | TB 75: MAX 7000B Devices: The Industry's Only Product-Term Device to Support 1.8-V Interfaces | Altera |
793. | Technical Brief | 105 KB | 4 | TB 39: Using Synopsys Design Compiler & FPGA Compiler to Synthesize Designs for MAX+PLUS II Software | Altera |
794. | Technical Brief | 45 KB | 2 | TB 40: Advantage of MAX+PLUS II Fitting | Altera |
795. | Technical Brief | 123 KB | 4 | TB 42: Using Synopsys FPGA Express Software to Synthesize Designs for MAX+PLUS II Software | Altera |
796. | Technical Brief | 88 KB | 4 | TB 44: Using Synplicity Synplify Software to Synthesize Designs for MAX+PLUS II Software | Altera |
797. | Technical Brief | 51 KB | 4 | TB 45: Importing Synthesized Files from EDA Tools into the MAX+PLUS II Software for Place & Route | Altera |
798. | Technical Brief | 239 KB | 2 | TB 3: FLEX Devices as Alternatives to ASSPs & ASICs | Altera |
799. | Technical Brief | 149 KB | 2 | TB 4: Using FLEX Devices as DSP Coprocessors | Altera |
800. | Technical Brief | 247 KB | 2 | TB 5: Implementing Multipliers in FLEX 10K EABs | Altera |