Producenci
Intersil 2220 dokumentacji
| NO. | Symbol elementu | Rozmiar pliku | Stron | Opis dokumentacji | Producent |
|---|---|---|---|---|---|
| 1801. | HSP43220VC-33 |
44 KB |
5 | Predicting Data Throughput in the Intersil HSP43220 | Intersil |
| 1802. | HSP43220VC-33 |
62 KB |
6 | Digital IF Subsampling Using the HI5702, HSP45116 and HSP43220 | Intersil |
| 1803. | HSP43220VC-33 |
244 KB |
19 | Decimating Digital Filter | Intersil |
| 1804. | HSP43220VC-33 |
33 KB |
6 | Decimating Digital Filter | Intersil |
| 1805. | HSP43220VC-33 |
14 KB |
2 | HSP43220 DECIMATE | Intersil |
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| 1806. | HSP43220VC-33 |
23 KB |
3 | Designing With the HSP43220 Using the DECIMATE | Intersil |
| 1807. | HSP43220VC-33 |
10 KB |
1 | HSP43220: Common Configuration Problems to Avoid | Intersil |
| 1808. | HSP43220VC-33 |
14 KB |
2 | HSP43220 - Design of Filters With Output Rates | Intersil |
| 1809. | HSP43220VC-33 |
18 KB |
2 | Using the HDF Bypass of the HSP43220 | Intersil |
| 1810. | HSP43220VC-33 |
11 KB |
1 | Reading Out FIR Coefficients From the HSP43220 | Intersil |
| 1811. | HSP43220VC-33 |
52 KB |
7 | Quadrature Down Conversion With the HSP45116, HSP43168 and HSP43220 | Intersil |
| 1812. | HSP45102PC-33 |
51 KB |
7 | 12-Bit Numerically Controlled Oscillator | Intersil |
| 1813. | HSP45102PC-33 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1814. | HSP45102PC-40 |
51 KB |
7 | 12-Bit Numerically Controlled Oscillator | Intersil |
| 1815. | HSP45102PC-40 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1816. | HSP45102SC-33 |
51 KB |
7 | 12-Bit Numerically Controlled Oscillator | Intersil |
| 1817. | HSP45102SC-33 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1818. | HSP45102SC-3396 |
51 KB |
7 | 12-Bit Numerically Controlled Oscillator | Intersil |
| 1819. | HSP45102SC-3396 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1820. | HSP45102SC-40 |
51 KB |
7 | 12-Bit Numerically Controlled Oscillator | Intersil |
| 1821. | HSP45102SC-40 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1822. | HSP45102SI-33 |
51 KB |
7 | 12-Bit Numerically Controlled Oscillator | Intersil |
| 1823. | HSP45102SI-33 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1824. | HSP45102SI-3396 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1825. | HSP45106JC-25 |
124 KB |
13 | 16-Bit Numerically Controlled Oscillator | Intersil |
| 1826. | HSP45106JC-25 |
32 KB |
6 | 16-Bit Numerically Controlled Oscillator | Intersil |
| 1827. | HSP45106JC-25 |
14 KB |
2 | Pipeline Delay Through the HSP45106 | Intersil |
| 1828. | HSP45106JC-25 |
24 KB |
3 | The NCO as a Stable, Accurate Synthesizer | Intersil |
| 1829. | HSP45106JC-25 |
20 KB |
2 | Reading the Phase Accumulator of the HSP45106 | Intersil |
| 1830. | HSP45106JC-33 |
124 KB |
13 | 16-Bit Numerically Controlled Oscillator | Intersil |
| 1831. | HSP45106JC-33 |
32 KB |
6 | 16-Bit Numerically Controlled Oscillator | Intersil |
| 1832. | HSP45106JC-33 |
14 KB |
2 | Pipeline Delay Through the HSP45106 | Intersil |
| 1833. | HSP45106JC-33 |
20 KB |
2 | Reading the Phase Accumulator of the HSP45106 | Intersil |
| 1834. | HSP45116AVC-52 |
62 KB |
6 | Digital IF Subsampling Using the HI5702, HSP45116 and HSP43220 | Intersil |
| 1835. | HSP45116AVC-52 |
129 KB |
18 | Numerically Controlled Oscillator/Modulator | Intersil |
| 1836. | HSP45116AVC-52 |
34 KB |
6 | Numerically Controlled Oscillator/Modulator | Intersil |
| 1837. | HSP45116AVC-52 |
261 KB |
12 | DSP Evaluation Platform | Intersil |
| 1838. | HSP45116AVC-52 |
570 KB |
13 | HSP45116 Daughter Board | Intersil |
| 1839. | HSP45116AVC-52 |
120 KB |
17 | Numerically Controlled Oscillator/Modulator | Intersil |
| 1840. | HSP45116AVC-52 |
52 KB |
7 | Quadrature Down Conversion With the HSP45116, HSP43168 and HSP43220 | Intersil |
| 1841. | HSP45116AVC-52 |
18 KB |
2 | Processing Signals At Increased Sample Rates With Multiple HSP45116's | Intersil |
| 1842. | HSP45116AVC-52 |
16 KB |
2 | Pipeline Delay Through the HSP45116 | Intersil |
| 1843. | HSP45116AVC-52 |
54 KB |
6 | Using the HSP45116 / HSP45116A as a Complex Multiplier Accumulator | Intersil |
| 1844. | HSP45116VC-25 |
62 KB |
6 | Digital IF Subsampling Using the HI5702, HSP45116 and HSP43220 | Intersil |
| 1845. | HSP45116VC-25 |
129 KB |
18 | Numerically Controlled Oscillator/Modulator | Intersil |
| 1846. | HSP45116VC-25 |
34 KB |
6 | Numerically Controlled Oscillator/Modulator | Intersil |
| 1847. | HSP45116VC-25 |
261 KB |
12 | DSP Evaluation Platform | Intersil |
| 1848. | HSP45116VC-25 |
570 KB |
13 | HSP45116 Daughter Board | Intersil |
| 1849. | HSP45116VC-25 |
120 KB |
17 | Numerically Controlled Oscillator/Modulator | Intersil |
| 1850. | HSP45116VC-25 |
18 KB |
2 | Processing Signals At Increased Sample Rates With Multiple HSP45116's | Intersil |
| 1851. | HSP45116VC-25 |
16 KB |
2 | Pipeline Delay Through the HSP45116 | Intersil |
| 1852. | HSP45116VC-25 |
54 KB |
6 | Using the HSP45116 / HSP45116A as a Complex Multiplier Accumulator | Intersil |
| 1853. | HSP50016JC-52 |
96 KB |
12 | Reducing the Minimum Decimation Rate of the HSP50016 Digital Down Converter | Intersil |
| 1854. | HSP50016JC-52 |
22 KB |
3 | Data Conversion Binary Code Formats | Intersil |
| 1855. | HSP50016JC-52 |
258 KB |
30 | Digital Down Converter | Intersil |
| 1856. | HSP50016JC-52 |
333 KB |
19 | DDC Evaluation Platform, User's Manual | Intersil |
| 1857. | HSP50016JC-5296 |
96 KB |
12 | Reducing the Minimum Decimation Rate of the HSP50016 Digital Down Converter | Intersil |
| 1858. | HSP50016JC-5296 |
22 KB |
3 | Data Conversion Binary Code Formats | Intersil |
| 1859. | HSP50016JC-5296 |
258 KB |
30 | Digital Down Converter | Intersil |
| 1860. | HSP50016JC-5296 |
333 KB |
19 | DDC Evaluation Platform, User's Manual | Intersil |
| 1861. | HSP50016JC-75 |
96 KB |
12 | Reducing the Minimum Decimation Rate of the HSP50016 Digital Down Converter | Intersil |
| 1862. | HSP50016JC-75 |
22 KB |
3 | Data Conversion Binary Code Formats | Intersil |
| 1863. | HSP50016JC-75 |
258 KB |
30 | Digital Down Converter | Intersil |
| 1864. | HSP50016JC-75 |
333 KB |
19 | DDC Evaluation Platform, User's Manual | Intersil |
| 1865. | HSP50016JI-52 |
96 KB |
12 | Reducing the Minimum Decimation Rate of the HSP50016 Digital Down Converter | Intersil |
| 1866. | HSP50016JI-52 |
22 KB |
3 | Data Conversion Binary Code Formats | Intersil |
| 1867. | HSP50016JI-52 |
258 KB |
30 | Digital Down Converter | Intersil |
| 1868. | HSP50016JI-52 |
333 KB |
19 | DDC Evaluation Platform, User's Manual | Intersil |
| 1869. | HSP50110JC-52 |
22 KB |
3 | Data Conversion Binary Code Formats | Intersil |
| 1870. | HSP50110JC-52 |
41 KB |
7 | Using the HSP50110/210EVAL Example Configuration Files | Intersil |
| 1871. | HSP50110JC-52 |
56 KB |
5 | Implementing Polyphase Filtering with the HSP50110 (DQT) HSP50210 (DCL) and the HSP43168 (DFF) | Intersil |
| 1872. | HSP50110JC-52 |
45 KB |
7 | Loading Custom Digital Filters Into the HSP50110/210EVAL | Intersil |
| 1873. | HSP50110JC-52 |
19 KB |
3 | Ten Tips for Successful HSP50110/210EVAL Board Operation | Intersil |
| 1874. | HSP50110JC-52 |
217 KB |
25 | Digital Quadrature Tuner | Intersil |
| 1875. | HSP50110JC-52 |
334 KB |
33 | HSP50110/HSP50210, SATCOM Modem Chipset Evaluation Platform | Intersil |
| 1876. | HSP50110JC-52 |
10 KB |
1 | HSP43220: Common Configuration Problems to Avoid | Intersil |
| 1877. | HSP50110JC-52 |
14 KB |
2 | HSP43220 - Design of Filters With Output Rates | Intersil |
| 1878. | HSP50110JC-52 |
11 KB |
1 | Reading Out FIR Coefficients From the HSP43220 | Intersil |
| 1879. | HSP50110JI-52 |
22 KB |
3 | Data Conversion Binary Code Formats | Intersil |
| 1880. | HSP50110JI-52 |
41 KB |
7 | Using the HSP50110/210EVAL Example Configuration Files | Intersil |
| 1881. | HSP50110JI-52 |
56 KB |
5 | Implementing Polyphase Filtering with the HSP50110 (DQT) HSP50210 (DCL) and the HSP43168 (DFF) | Intersil |
| 1882. | HSP50110JI-52 |
45 KB |
7 | Loading Custom Digital Filters Into the HSP50110/210EVAL | Intersil |
| 1883. | HSP50110JI-52 |
19 KB |
3 | Ten Tips for Successful HSP50110/210EVAL Board Operation | Intersil |
| 1884. | HSP50110JI-52 |
217 KB |
25 | Digital Quadrature Tuner | Intersil |
| 1885. | HSP50110JI-52 |
334 KB |
33 | HSP50110/HSP50210, SATCOM Modem Chipset Evaluation Platform | Intersil |
| 1886. | HSP50110JI-52 |
10 KB |
1 | HSP43220: Common Configuration Problems to Avoid | Intersil |
| 1887. | HSP50110JI-52 |
14 KB |
2 | HSP43220 - Design of Filters With Output Rates | Intersil |
| 1888. | HSP50110JI-52 |
11 KB |
1 | Reading Out FIR Coefficients From the HSP43220 | Intersil |
| 1889. | HSP50210JC-52 |
22 KB |
3 | Data Conversion Binary Code Formats | Intersil |
| 1890. | HSP50210JC-52 |
56 KB |
5 | Implementing Polyphase Filtering with the HSP50110 (DQT) HSP50210 (DCL) and the HSP43168 (DFF) | Intersil |
| 1891. | HSP50210JC-52 |
45 KB |
7 | Loading Custom Digital Filters Into the HSP50110/210EVAL | Intersil |
| 1892. | HSP50210JC-52 |
340 KB |
49 | Digital Costas Loop | Intersil |
| 1893. | HSP50210JC-52 |
334 KB |
33 | HSP50110/HSP50210, SATCOM Modem Chipset Evaluation Platform | Intersil |
| 1894. | HSP50210JI-52 |
56 KB |
5 | Implementing Polyphase Filtering with the HSP50110 (DQT) HSP50210 (DCL) and the HSP43168 (DFF) | Intersil |
| 1895. | HSP50210JI-52 |
45 KB |
7 | Loading Custom Digital Filters Into the HSP50110/210EVAL | Intersil |
| 1896. | HSP50210JI-52 |
340 KB |
49 | Digital Costas Loop | Intersil |
| 1897. | HSP50210JI-52 |
334 KB |
33 | HSP50110/HSP50210, SATCOM Modem Chipset Evaluation Platform | Intersil |
| 1898. | HSP50214BVC |
126 KB |
17 | Calculating Maximum Processing Rates of the PDC (HSP50214, HSP50214A and HSP50214B) | Intersil |
| 1899. | HSP50214BVC |
412 KB |
2 | ST-114 Intersil HSP50214 Downconverter Evaluation Board (Sigtek 410-290-3918) | Intersil |
| 1900. | HSP50214BVC |
466 KB |
61 | Programmable Downconverter | Intersil |